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Nanoelectronic Devices

When you'll study it
Semester 1
CATS points
15
ECTS points
7.5
Level
Level 6
Module lead
Stuart Boden
Academic year
2025-26

Module overview

The module will discuss all important issues related to scaling down the transistor size into the nanometer regime, such as high-k dielectrics and FINFETs. The teaching will be complemented with a finite element simulation of the MOS scaling which will bring into practice many of the above improvements. Silvaco TCAD tools are used: industry-standard software to simulate semiconductor processing and device operation (Technology Computer-Aided Design).

Linked modules

Pre-requisite: ELEC2201