Digital System Design

Learning Outcomes

Subject Specific Practical Skills

Having successfully completed this module you will be able to:

• Validate a digital system using a simulator
• Synthesise a digital system to an FPGA

Knowledge and Understanding

Having successfully completed this module, you will be able to demonstrate knowledge and understanding of:

• How to include design for test structures in a sequential digital system
• Describe sequential digital systems in a hardware description language.

Subject Specific Intellectual and Research Skills

Having successfully completed this module you will be able to:

• Generate tests for a combinational digital circuit
• Know how to model circuits and systems in SystemVerilog.

• Hardward Description Languages: SystemVerilog
• Basic building blocks and language constructs
• Register Transfer-Level Design
• Controller/datapath partitioning
• Synthesising designs to FPGAs
• Simulation and synthesis principles
• Test generation and design for test
• Built in Test: Principles, structures, signature analysis
• Multiple Clock Domains: Transferring data between clock domains.

Summative

This is how we’ll formally assess what you have learned in this module.

Referral

This is how we’ll assess you if you don’t meet the criteria to pass this module.

Repeat

An internal repeat is where you take all of your modules again, including any you passed. An external repeat is where you only re-take the modules you failed.