About the project
Massively parallel compute architectures, like Graphics Processing Units (GPUs) and Field-Programmable Gate Arrays (FPGAs), are becoming an integral part of the high-performance computing ecosystem. This project is about effective mapping of large parallel problems onto these architectures, improving the optimised performance of numerical simulations and artificial intelligence. You will access leading supercomputer resources to achieve this.
Massive parallel compute architectures such as GPUs and FPGAs are becoming increasingly popular, as they offer greater parallelism capabilities and more application-specific processing capability, compared to traditional high-performance computing approaches. Graph-based problems are particularly amenable to massive parallelism: a large number of small processing elements performing simple computation, that interact with each other using small messages. These include (and are certainly not limited to):
- machine learning models
- finite-element modelling
- cellular automata problems
Despite the ubiquity of graph-based massive parallel problems, determining how to map such problems onto hardware remains a largely unexplored problem, in part because hardware has only recently become available to support the truly massive parallelism.
This is a major research opportunity in the development of efficient, general-purpose mapping algorithms for parallel systems that can start from an abstract graph representation of the problem and produce a hardware graph representing the problem as mapped to the physical hardware.
In this research, you will develop effective mapping algorithms for graph-based problems. To achieve this, you will work with multiple existing massively parallel hardware architectures at the University of Southampton. The goal will be to derive general principles for mapping, so that parallel programs can be designed using a structured approach, rather than through a collection of heuristics and ad-hoc techniques. This knowledge is of immediate value in industry: to reduce the compute times in the large-scale simulations from days to minutes, using much more economical and low-power hardware.
You will join an engineering research team of computer engineering researchers who will provide expert, tailored guidance, a wealth of dedicated massively-parallel compute infrastructure.
